A Parallel Algorithm for VLSI Test Generation

Muralidhar Medidi, A. Sagahyroon. A Parallel Algorithm for VLSI Test Generation. In M. H. Hamza, editor, Proceedings of the Seventh IASTED/ISMM International Conference on Parallel and Distributed Computing and Systems, Washington, D.C., USA, October 19-21, 1995. pages 280-282, IASTED/ACTA Press, 1995.

Abstract

Abstract is missing.