A Novel Systolic Parallel Hardware Architecture for the FPGA Acceleration of Feedforward Neural Networks - researchr publication

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Leandro D. Medus, Taras Iakymchuk, José Vicente Francés-Víllora, Manuel Bataller-Mompeán, Alfredo Rosado Muñoz. A Novel Systolic Parallel Hardware Architecture for the FPGA Acceleration of Feedforward Neural Networks. IEEE Access, 7:76084-76103, 2019. [doi]

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