Clock gating and multi-VTH low power design methods based on 32/28 nm ORCA processor

Vazgen Melikyan, Eduard Babayan, Anush Melikyan, Davit Babayan, Poghos Petrosyan, Edvard Mkrtchyan. Clock gating and multi-VTH low power design methods based on 32/28 nm ORCA processor. In 2015 IEEE East-West Design & Test Symposium, EWDTS 2015, Batumi, Georgia, September 26-29, 2015. pages 1-4, IEEE Computer Society, 2015. [doi]

Authors

Vazgen Melikyan

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Eduard Babayan

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Anush Melikyan

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Davit Babayan

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Poghos Petrosyan

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Edvard Mkrtchyan

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