FPGA implementation of a run-time configurable NTT-based polynomial multiplication hardware

Ahmet Can Mert, Erdinç Öztürk, Erkay Savas. FPGA implementation of a run-time configurable NTT-based polynomial multiplication hardware. Microprocessors and Microsystems, 78:103219, 2020. [doi]

@article{MertOS20-1,
  title = {FPGA implementation of a run-time configurable NTT-based polynomial multiplication hardware},
  author = {Ahmet Can Mert and Erdinç Öztürk and Erkay Savas},
  year = {2020},
  doi = {10.1016/j.micpro.2020.103219},
  url = {https://doi.org/10.1016/j.micpro.2020.103219},
  researchr = {https://researchr.org/publication/MertOS20-1},
  cites = {0},
  citedby = {0},
  journal = {Microprocessors and Microsystems},
  volume = {78},
  pages = {103219},
}