A Processor Architecture Designed to Faciliate the Safety Certification of Hard Real Time Systems

Hans-Peter Meske, Wolfgang A. Halang. A Processor Architecture Designed to Faciliate the Safety Certification of Hard Real Time Systems. In Erwin Schoitsch, editor, 15th International Conference on Computer Safety, Reliability and Security, Safe Comp 1996, Vienna, Austria, October 23-25 1996. pages 61-70, Springer, 1996. [doi]

Abstract

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