FPGA-accelerated simulation of a hybrid-ARQ system using high level synthesis - researchr publication

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Swapnil Mhaske, Hojin Kee, Tai Ly, Predrag Spasojevic. FPGA-accelerated simulation of a hybrid-ARQ system using high level synthesis. In 2016 37th IEEE Sarnoff Symposium, Newark, NJ, USA, September 19-21, 2016. pages 19-21, IEEE, 2016. [doi]

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