VLSI interconnect delay analysis method for ramp input signal

Nobuyuki Mihara, Goro Suzuki. VLSI interconnect delay analysis method for ramp input signal. In 2011 IEEE 9th International Conference on ASIC, ASICON 2011, Xiamen, China, October 25-28, 2011. pages 324-328, IEEE, 2011. [doi]

Abstract

Abstract is missing.