A 5500-frames/s 85-GOPS/W 3-D Stacked BSI Vision Chip Based on Parallel In-Focal-Plane Acquisition and Processing

Laurent Millet, Stéphane Chevobbe, Caaliph Andriamisaina, Lamine Benaissa, Edouard Deschaseaux, Edith Beigné, Karim Ben Chehida, Maria Lepecq, Mehdi Darouich, Fabrice Guellec, Thomas Dombek, Marc Duranton. A 5500-frames/s 85-GOPS/W 3-D Stacked BSI Vision Chip Based on Parallel In-Focal-Plane Acquisition and Processing. J. Solid-State Circuits, 54(4):1096-1105, 2019. [doi]

@article{MilletCABDBCLDG19,
  title = {A 5500-frames/s 85-GOPS/W 3-D Stacked BSI Vision Chip Based on Parallel In-Focal-Plane Acquisition and Processing},
  author = {Laurent Millet and Stéphane Chevobbe and Caaliph Andriamisaina and Lamine Benaissa and Edouard Deschaseaux and Edith Beigné and Karim Ben Chehida and Maria Lepecq and Mehdi Darouich and Fabrice Guellec and Thomas Dombek and Marc Duranton},
  year = {2019},
  doi = {10.1109/JSSC.2018.2886325},
  url = {https://doi.org/10.1109/JSSC.2018.2886325},
  researchr = {https://researchr.org/publication/MilletCABDBCLDG19},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {54},
  number = {4},
  pages = {1096-1105},
}