Efficient nanoscale VLSI standard cell library characterization using a novel delay model

Sandeep Miryala, Baljit Kaur, Bulusu Anand, Sanjeev Manhas. Efficient nanoscale VLSI standard cell library characterization using a novel delay model. In Proceedings of the 12th International Symposium on Quality Electronic Design, ISQED 2011, Santa Clara, California, USA, 14-16 March 2011. pages 458-463, IEEE, 2011. [doi]

@inproceedings{MiryalaKAM11,
  title = {Efficient nanoscale VLSI standard cell library characterization using a novel delay model},
  author = {Sandeep Miryala and Baljit Kaur and Bulusu Anand and Sanjeev Manhas},
  year = {2011},
  doi = {10.1109/ISQED.2011.5770767},
  url = {http://dx.doi.org/10.1109/ISQED.2011.5770767},
  researchr = {https://researchr.org/publication/MiryalaKAM11},
  cites = {0},
  citedby = {0},
  pages = {458-463},
  booktitle = {Proceedings of the 12th International Symposium on Quality Electronic Design, ISQED 2011, Santa Clara, California, USA, 14-16 March 2011},
  publisher = {IEEE},
  isbn = {978-1-61284-914-0},
}