Effect of MT and VT CMOS, on Transmission Gate Logic for Low Power 4: 1 MUX in 45 nm Technology - researchr publication authors

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Meenakshi Mishra, Shyam Akashe, Shyam Babu. Effect of MT and VT CMOS, on Transmission Gate Logic for Low Power 4: 1 MUX in 45 nm Technology. In Jagdish Chand Bansal, Pramod Kumar Singh, Kusum Deep, Millie Pant, Atulya Nagar, editors, Proceedings of Seventh International Conference on Bio-Inspired Computing: Theories and Applications (BIC-TA 2012) - Volume 2. Volume 202 of Advances in Intelligent Systems and Computing, pages 139-150, Springer, 2012. [doi]

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