Effect of MT and VT CMOS, on Transmission Gate Logic for Low Power 4: 1 MUX in 45 nm Technology

Meenakshi Mishra, Shyam Akashe, Shyam Babu. Effect of MT and VT CMOS, on Transmission Gate Logic for Low Power 4: 1 MUX in 45 nm Technology. In Jagdish Chand Bansal, Pramod Kumar Singh, Kusum Deep, Millie Pant, Atulya Nagar, editors, Proceedings of Seventh International Conference on Bio-Inspired Computing: Theories and Applications (BIC-TA 2012) - Volume 2. Volume 202 of Advances in Intelligent Systems and Computing, pages 139-150, Springer, 2012. [doi]

@inproceedings{MishraAB12,
  title = {Effect of MT and VT CMOS, on Transmission Gate Logic for Low Power 4: 1 MUX in 45 nm Technology},
  author = {Meenakshi Mishra and Shyam Akashe and Shyam Babu},
  year = {2012},
  doi = {10.1007/978-81-322-1041-2_12},
  url = {http://dx.doi.org/10.1007/978-81-322-1041-2_12},
  researchr = {https://researchr.org/publication/MishraAB12},
  cites = {0},
  citedby = {0},
  pages = {139-150},
  booktitle = {Proceedings of Seventh International Conference on Bio-Inspired Computing: Theories and Applications (BIC-TA 2012) - Volume 2},
  editor = {Jagdish Chand Bansal and Pramod Kumar Singh and Kusum Deep and Millie Pant and Atulya Nagar},
  volume = {202},
  series = {Advances in Intelligent Systems and Computing},
  publisher = {Springer},
  isbn = {978-81-322-1040-5},
}