Die-level leakage power analysis of FinFET circuits considering process variations

Prateek Mishra, Ajay N. Bhoj, Niraj K. Jha. Die-level leakage power analysis of FinFET circuits considering process variations. In 11th International Symposium on Quality of Electronic Design (ISQED 2010), 22-24 March 2010, San Jose, CA, USA. pages 347-355, IEEE, 2010. [doi]

Abstract

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