Modeling and Verification of Pipelined Embedded Processors in the Presence of Hazards and Exceptions

Prabhat Mishra, Nikil D. Dutt. Modeling and Verification of Pipelined Embedded Processors in the Presence of Hazards and Exceptions. In Bernd Kleinjohann, K. H. Kim, Lisa Kleinjohann, Achim Rettberg, editors, Design and Analysis of Distributed Embedded Systems, IFIP 17:::th::: World Computer Congress - TC10 Stream on Distributed and Parallel Embedded Systems (DIPES 2002), August 25-29, 2002, Montréal, Québec, Canada. Volume 219 of IFIP Conference Proceedings, pages 81-90, Kluwer, 2002.

Abstract

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