DSEAdd: FPGA based Design Space Exploration for Approximate Adders with Variable Bit-precision

Archie Mishra, Nanditha Rao. DSEAdd: FPGA based Design Space Exploration for Approximate Adders with Variable Bit-precision. In 24th International Symposium on Quality Electronic Design, ISQED 2023, San Francisco, CA, USA, April 5-7, 2023. pages 1-8, IEEE, 2023. [doi]

@inproceedings{MishraR23-1,
  title = {DSEAdd: FPGA based Design Space Exploration for Approximate Adders with Variable Bit-precision},
  author = {Archie Mishra and Nanditha Rao},
  year = {2023},
  doi = {10.1109/ISQED57927.2023.10129364},
  url = {https://doi.org/10.1109/ISQED57927.2023.10129364},
  researchr = {https://researchr.org/publication/MishraR23-1},
  cites = {0},
  citedby = {0},
  pages = {1-8},
  booktitle = {24th International Symposium on Quality Electronic Design, ISQED 2023, San Francisco, CA, USA, April 5-7, 2023},
  publisher = {IEEE},
  isbn = {979-8-3503-3475-3},
}