Time-domain neural network: A 48.5 TSOp/s/W neuromorphic chip optimized for deep learning and CMOS technology

Daisuke Miyashita, Shouhei Kousai, Tomoya Suzuki, Jun Deguchi. Time-domain neural network: A 48.5 TSOp/s/W neuromorphic chip optimized for deep learning and CMOS technology. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2016, Toyama, Japan, November 7-9, 2016. pages 25-28, IEEE, 2016. [doi]

@inproceedings{MiyashitaKSD16,
  title = {Time-domain neural network: A 48.5 TSOp/s/W neuromorphic chip optimized for deep learning and CMOS technology},
  author = {Daisuke Miyashita and Shouhei Kousai and Tomoya Suzuki and Jun Deguchi},
  year = {2016},
  doi = {10.1109/ASSCC.2016.7844126},
  url = {http://dx.doi.org/10.1109/ASSCC.2016.7844126},
  researchr = {https://researchr.org/publication/MiyashitaKSD16},
  cites = {0},
  citedby = {0},
  pages = {25-28},
  booktitle = {IEEE Asian Solid-State Circuits Conference, A-SSCC 2016, Toyama, Japan, November 7-9, 2016},
  publisher = {IEEE},
  isbn = {978-1-5090-3700-1},
}