Design of a computational nonvolatile RAM for a greedy energy-efficient VLSI processor - researchr publication authors

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Akira Mochizuki, Naoto Yube, Takahiro Hanyu. Design of a computational nonvolatile RAM for a greedy energy-efficient VLSI processor. In IECON 2015 - 41st Annual Conference of the IEEE Industrial Electronics Society, Yokohama, Japan, November 9-12, 2015. pages 3283-3288, IEEE, 2015. [doi]

This author has not been identified. Look up 'Akira Mochizuki' in GoogleThis author has not been identified. Look up 'Naoto Yube' in GoogleThis author has not been identified. Look up 'Takahiro Hanyu' in Google

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