Design of a computational nonvolatile RAM for a greedy energy-efficient VLSI processor

Akira Mochizuki, Naoto Yube, Takahiro Hanyu. Design of a computational nonvolatile RAM for a greedy energy-efficient VLSI processor. In IECON 2015 - 41st Annual Conference of the IEEE Industrial Electronics Society, Yokohama, Japan, November 9-12, 2015. pages 3283-3288, IEEE, 2015. [doi]

@inproceedings{MochizukiYH15,
  title = {Design of a computational nonvolatile RAM for a greedy energy-efficient VLSI processor},
  author = {Akira Mochizuki and Naoto Yube and Takahiro Hanyu},
  year = {2015},
  doi = {10.1109/IECON.2015.7392606},
  url = {https://doi.org/10.1109/IECON.2015.7392606},
  researchr = {https://researchr.org/publication/MochizukiYH15},
  cites = {0},
  citedby = {0},
  pages = {3283-3288},
  booktitle = {IECON 2015 - 41st Annual Conference of the IEEE Industrial Electronics Society, Yokohama, Japan, November 9-12, 2015},
  publisher = {IEEE},
  isbn = {978-1-4799-1762-4},
}