Saraju P. Mohanty, Nagarajan Ranganathan, Sunil K. Chappidi. ILP Models for Energy and Transient Power Minimization During Behavioral Synthesis. In 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India. pages 745-748, IEEE Computer Society, 2004. [doi]
@inproceedings{MohantyRC04,
title = {ILP Models for Energy and Transient Power Minimization During Behavioral Synthesis},
author = {Saraju P. Mohanty and Nagarajan Ranganathan and Sunil K. Chappidi},
year = {2004},
url = {http://csdl.computer.org/comp/proceedings/vlsid/2004/2072/00/20720745abs.htm},
researchr = {https://researchr.org/publication/MohantyRC04},
cites = {0},
citedby = {0},
pages = {745-748},
booktitle = {17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India},
publisher = {IEEE Computer Society},
isbn = {0-7695-2072-3},
}