Constrained via minimization for systolic arrays

Paul Molitor. Constrained via minimization for systolic arrays. IEEE Trans. on CAD of Integrated Circuits and Systems, 9(5):537-542, 1990. [doi]

@article{Molitor90,
  title = {Constrained via minimization for systolic arrays},
  author = {Paul Molitor},
  year = {1990},
  doi = {10.1109/43.55183},
  url = {http://doi.ieeecomputersociety.org/10.1109/43.55183},
  researchr = {https://researchr.org/publication/Molitor90},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume = {9},
  number = {5},
  pages = {537-542},
}