Design for testability features of the SUN microsystems niagara2 CMP/CMT SPARC chip

Robert F. Molyneaux, Thomas A. Ziaja, Hong Kim, Shahryar Aryani, Sungbae Hwang, Alex Hsieh. Design for testability features of the SUN microsystems niagara2 CMP/CMT SPARC chip. In Jill Sibert, Janusz Rajski, editors, 2007 IEEE International Test Conference, ITC 2007, Santa Clara, California, USA, October 21-26, 2007. pages 1-8, IEEE, 2007. [doi]

Authors

Robert F. Molyneaux

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Thomas A. Ziaja

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Hong Kim

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Shahryar Aryani

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Sungbae Hwang

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Alex Hsieh

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