Robert F. Molyneaux, Thomas A. Ziaja, Hong Kim, Shahryar Aryani, Sungbae Hwang, Alex Hsieh. Design for testability features of the SUN microsystems niagara2 CMP/CMT SPARC chip. In Jill Sibert, Janusz Rajski, editors, 2007 IEEE International Test Conference, ITC 2007, Santa Clara, California, USA, October 21-26, 2007. pages 1-8, IEEE, 2007. [doi]
@inproceedings{MolyneauxZKAHH07,
title = {Design for testability features of the SUN microsystems niagara2 CMP/CMT SPARC chip},
author = {Robert F. Molyneaux and Thomas A. Ziaja and Hong Kim and Shahryar Aryani and Sungbae Hwang and Alex Hsieh},
year = {2007},
doi = {10.1109/TEST.2007.4437561},
url = {http://dx.doi.org/10.1109/TEST.2007.4437561},
researchr = {https://researchr.org/publication/MolyneauxZKAHH07},
cites = {0},
citedby = {0},
pages = {1-8},
booktitle = {2007 IEEE International Test Conference, ITC 2007, Santa Clara, California, USA, October 21-26, 2007},
editor = {Jill Sibert and Janusz Rajski},
publisher = {IEEE},
isbn = {1-4244-1128-9},
}