A low power FPGA routing architecture

Somsubhra Mondal, Seda Ogrenci Memik. A low power FPGA routing architecture. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 1222-1225, IEEE, 2005. [doi]

@inproceedings{MondalM05:2,
  title = {A low power FPGA routing architecture},
  author = {Somsubhra Mondal and Seda Ogrenci Memik},
  year = {2005},
  doi = {10.1109/ISCAS.2005.1464814},
  url = {http://dx.doi.org/10.1109/ISCAS.2005.1464814},
  tags = {architecture, routing},
  researchr = {https://researchr.org/publication/MondalM05%3A2},
  cites = {0},
  citedby = {0},
  pages = {1222-1225},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan},
  publisher = {IEEE},
}