Fault-Secure Interface Between Fault-Tolerant RAM and Transmission Channel Using Systematic Cyclic Codes

Fabrice Monteiro, Stanislaw J. Piestrak, Houssein Jaber, Abbas Dandache. Fault-Secure Interface Between Fault-Tolerant RAM and Transmission Channel Using Systematic Cyclic Codes. In 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 8-11 July 2007, Heraklion, Crete, Greece. pages 199-200, IEEE Computer Society, 2007. [doi]

@inproceedings{MonteiroPJD07,
  title = {Fault-Secure Interface Between Fault-Tolerant RAM and Transmission Channel Using Systematic Cyclic Codes},
  author = {Fabrice Monteiro and Stanislaw J. Piestrak and Houssein Jaber and Abbas Dandache},
  year = {2007},
  doi = {10.1109/IOLTS.2007.32},
  url = {http://doi.ieeecomputersociety.org/10.1109/IOLTS.2007.32},
  tags = {systematic-approach},
  researchr = {https://researchr.org/publication/MonteiroPJD07},
  cites = {0},
  citedby = {0},
  pages = {199-200},
  booktitle = {13th IEEE International On-Line Testing Symposium (IOLTS 2007), 8-11 July 2007, Heraklion, Crete, Greece},
  publisher = {IEEE Computer Society},
}