Haruki Mori, Tomoki Nakagawa, Yuki Kitahara, Yuta Kawamoto, Kenta Takagi, Shusuke Yoshimoto, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto. An low-energy 8T dual-port SRAM for image processor with selective sourceline drive scheme in 28-nm FD-SOI process technology. In 2016 IEEE International Conference on Electronics, Circuits and Systems, ICECS 2016, Monte Carlo, Monaco, December 11-14, 2016. pages 532-535, IEEE, 2016. [doi]
@inproceedings{MoriNKKTYIKY16, title = {An low-energy 8T dual-port SRAM for image processor with selective sourceline drive scheme in 28-nm FD-SOI process technology}, author = {Haruki Mori and Tomoki Nakagawa and Yuki Kitahara and Yuta Kawamoto and Kenta Takagi and Shusuke Yoshimoto and Shintaro Izumi and Hiroshi Kawaguchi and Masahiko Yoshimoto}, year = {2016}, doi = {10.1109/ICECS.2016.7841256}, url = {http://dx.doi.org/10.1109/ICECS.2016.7841256}, researchr = {https://researchr.org/publication/MoriNKKTYIKY16}, cites = {0}, citedby = {0}, pages = {532-535}, booktitle = {2016 IEEE International Conference on Electronics, Circuits and Systems, ICECS 2016, Monte Carlo, Monaco, December 11-14, 2016}, publisher = {IEEE}, isbn = {978-1-5090-6113-6}, }