Partially redundant fence elimination for x86, ARM, and power processors

Robin Morisset, Francesco Zappa Nardelli. Partially redundant fence elimination for x86, ARM, and power processors. In Peng Wu 0001, Sebastian Hack, editors, Proceedings of the 26th International Conference on Compiler Construction, Austin, TX, USA, February 5-6, 2017. pages 1-10, ACM, 2017. [doi]

@inproceedings{MorissetN17,
  title = {Partially redundant fence elimination for x86, ARM, and power processors},
  author = {Robin Morisset and Francesco Zappa Nardelli},
  year = {2017},
  url = {http://dl.acm.org/citation.cfm?id=3033021},
  researchr = {https://researchr.org/publication/MorissetN17},
  cites = {0},
  citedby = {0},
  pages = {1-10},
  booktitle = {Proceedings of the 26th International Conference on Compiler Construction, Austin, TX, USA, February 5-6, 2017},
  editor = {Peng Wu 0001 and Sebastian Hack},
  publisher = {ACM},
  isbn = {978-1-4503-5233-8},
}