A novel optimization method for reversible logic circuit minimization

Matthew Morrison, Nagarajan Ranganathan. A novel optimization method for reversible logic circuit minimization. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2013, Natal, Brazil, August 5-7, 2013. pages 182-187, IEEE, 2013. [doi]

Authors

Matthew Morrison

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Nagarajan Ranganathan

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