Matthew Morrison, Nagarajan Ranganathan. A novel optimization method for reversible logic circuit minimization. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2013, Natal, Brazil, August 5-7, 2013. pages 182-187, IEEE, 2013. [doi]
@inproceedings{MorrisonR13-0,
title = {A novel optimization method for reversible logic circuit minimization},
author = {Matthew Morrison and Nagarajan Ranganathan},
year = {2013},
doi = {10.1109/ISVLSI.2013.6654656},
url = {http://dx.doi.org/10.1109/ISVLSI.2013.6654656},
researchr = {https://researchr.org/publication/MorrisonR13-0},
cites = {0},
citedby = {0},
pages = {182-187},
booktitle = {IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2013, Natal, Brazil, August 5-7, 2013},
publisher = {IEEE},
}