Multiplexed switch box architecture in three-dimensional FPGAs to reduce silicon area and improve TSV usage - researchr publication authors

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Marzieh Morshedzadeh Morshedzadeh, Ali Jahanian. Multiplexed switch box architecture in three-dimensional FPGAs to reduce silicon area and improve TSV usage. In Erik Brunvard, Ken Stevens, Joseph R. Cavallaro, Tong Zhang 0002, editors, Great Lakes Symposium on VLSI 2012, GLSVLSI'12, Salt Lake Cit, UT, USA, May 3-4, 2012. pages 303-306, ACM, 2012. [doi]

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