An on-chip parallel memory architecture for a stereo vision system

Andy Motten, Luc Claesen. An on-chip parallel memory architecture for a stereo vision system. In 17th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010, Athens, Greece, 12-15 December, 2010. pages 495-498, IEEE, 2010. [doi]

Authors

Andy Motten

This author has not been identified. Look up 'Andy Motten' in Google

Luc Claesen

This author has not been identified. Look up 'Luc Claesen' in Google