Farzad Mozafari, Majid Ahmadi, Arash Ahmadi. Design and Implementation of Full Adder Circuit Based on VTM-Logic Gates. In 66th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2023, Tempe, AZ, USA, August 6-9, 2023. pages 389-393, IEEE, 2023. [doi]
@inproceedings{MozafariAA23-0,
title = {Design and Implementation of Full Adder Circuit Based on VTM-Logic Gates},
author = {Farzad Mozafari and Majid Ahmadi and Arash Ahmadi},
year = {2023},
doi = {10.1109/MWSCAS57524.2023.10405980},
url = {https://doi.org/10.1109/MWSCAS57524.2023.10405980},
researchr = {https://researchr.org/publication/MozafariAA23-0},
cites = {0},
citedby = {0},
pages = {389-393},
booktitle = {66th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2023, Tempe, AZ, USA, August 6-9, 2023},
publisher = {IEEE},
isbn = {979-8-3503-0210-3},
}