Table of Contents

• Mini-YOLOX: A Lightweight Network for Real-Time Embedded ApplicationsAhmed N. El-Zeiny, Adham Hassan, Hassan Mostafa, Ahmed H. Khalil. 1-5 [doi]
• A Multi-Stage Zero-Crossing-Based Amplifier Using Floating-Inverter Amplifier With Background Offset Calibration and Self-Timed LoopTaylor Barton, Yen-Cheng Kuan, Shiuh-Hua Wood Chiang. 1-5 [doi]
• Improving Flight of Crazyflie Quadcopters Using Online Reinforcement LearningSteven Comandini, Drew Shambaugh, Yufeng Lu, Jing Wang. 6-9 [doi]
• An Efficient Meta-Reinforcement Learning Approach for Circuit Linearity Calibration via Style InjectionChao Rong, Jeyanandh Paramesh, L. Richard Carley. 10-14 [doi]
• Neuromorphic Dendritic Synapse Integrating Gated-RRAMSiddharth Barve, Rashmi Jha. 15-19 [doi]
• Unsupervised IC Security with Machine Learning for Trojan DetectionAshutosh Ghimire, Fathi H. Amsaad 0001, Tamzidul Hoque, Kenneth M. Hopkinson, Md Tauhidur Rahman. 20-24 [doi]
• An Optimal Methodology for EM-Based Hardware Trojan Placement on Clock Tree NetworksAlexandra Takou, Olympia Axelou, George Floros 0002, Nestoras E. Evmorfopoulos, Georgios I. Stamoulis. 25-29 [doi]
• Identification of Stealthy Hardware Trojans through On-Chip Temperature Sensing and an Autoencoder-Based Machine Learning AlgorithmThomas Gourousis, Ziyue Zhang, Mengting Yan, Millin Zhang, Ankit Mittal, Aatmesh Shrivastava, Francesco Restuccia, Yunsi Fei, Marvin Onabajo. 30-34 [doi]
• Ring Oscillator PUF and Blockchain: A Way of Securing Post Fabrication FPGA Supply ChainAkshay Kulkarni, Noor Ahmad Hazari, Mohammed Y. Niamat. 35-39 [doi]
• Analysis of Molecular MUX PUFs with Stochastic ChallengesCarl Anderson, Xingyi Liu, Keshab K. Parhi. 40-44 [doi]
• SiC MOSFET High Side Gate Driver Design Using HV CMOS ProcessOliver Lexter July A. Jose, Jui-Min Kuo, Venkata Naveen Kolakaluri, Chua-Chin Wang. 45-49 [doi]
• A 37nW, All-in-One Trim-Free Voltage/Current Reference Without Using Resistors and AmplifiersChetan Mittal, Arnab Dey, Ashfakh Ali, Khanh M. Le, Zia Abbas. 50-54 [doi]
• Design of Wideband Multiplierless Compensators for Sharpened CIC FiltersGordana Jovanovic-Dolecek, José M. de la Rosa 0001. 55-58 [doi]
• st Order-Compensated Bandgap ReferencesDaniel Adjei, Bryce Gadogbe, Degang Chen 0001, Randall L. Geiger, Shravan K. Chaganti, Dhyey Desai, Jerry Doorenbos, Jim Todsen. 59-63 [doi]
• Parasitic Extraction Modeling for Standard Cell Library on Intel 4 TechnologyDigvijay Rajurkar, Vidya Sagar Reddy Gopala, Srimathi Govindan. 64-68 [doi]
• A 10-Bit 250-KS/s 1.24-uW SAR ADC for IoT Sensors with Energy-Efficient ComparatorXiaowei Zhang, Zhengxue Shi, Jianxiong Xi, Lenian He. 69-73 [doi]
• A Two-Step SAR Capacitance-to-Digital ConverterAlexander Castro, Pamela Abshire. 74-78 [doi]
• A High-Speed Low-Power Two-Stage Comparator with Regeneration Enhancement and Through Current Suppression TechniquesChia-Wei Pai, Hiroki Ishikuro. 79-83 [doi]
• PLL-SAR: A New High-Speed Analog to Digital Converter ArchitectureVladimir Veselý, Calvin Yoji Lee, Tejasvi Anand, Un-Ku Moon. 84-88 [doi]
• ADC-Less 3D-NAND Compute-in-Memory Architecture Using Margin PropagationAswin Chowdary Undavalli, Gert Cauwenberghs, Arun Natarajan 0001, Shantanu Chakrabartty, Aravind Nagulu. 89-92 [doi]
• Design Space Exploration of Analog CAM for Tree-Based ModelsAishwarya Natarajan, Luca Buonanno, Todd Richmond, David Vickers, Xia Sheng, John Moon, Darrin Miller, Giacomo Pedretti, Catherine Graves, Jim Ignowski. 93-97 [doi]
• Challenges in Circuits of Nonvolatile Compute-In-Memory for Edge AI ChipsHung-Hsi Hsu, Tai-Hao Wen, Ping-Chun Wu, Chuan-Jia Jhang, De-Qi You, Ping-Cheng Chen, Meng-Fan Chang. 98-102 [doi]
• Modeling and Analysis of Analog Non-Volatile Devices for Compute-In-Memory ApplicationsCarl Brando, Minseong Park, Sayma Nowshin Chowdhury, Matthew Chen, Kyusang Lee, Sahil Shah. 103-107 [doi]
• Cross-Layer Optimizations for Ferroelectric Neuromorphic ComputingA. N. M. Nafiul Islam, Kai Ni 0004, Abhronil Sengupta. 108-112 [doi]
• A high-Sensitivity G3-PLC SoC with OpenCPUShuai Zhou, Junjie Hong, Nianxiong Tan. 113-117 [doi]
• Predictive LSB-First Successive Approximation for SAR Analog-to-Digital ConvertersJiayi Chen, Xiaoming Liu 0008, Chao Yang, Jing Jin 0005, Zhongyuan Chang, Jianjun Zhou. 118-122 [doi]
• A High Energy Efficiency Discrete-Time Σ Δ Modulator Based on Floating Inverter AmplifierZirui Wang, Youze Xin, Bing Zhang, Yiyun Xie, Pengfei Hu, Qidi Li, Li Geng. 123-127 [doi]
• A 0.4-11-GHz Active-Feedforward-Noise-Canceling LNA in Stacked n/pMOS ConfigurationsRunwu Fan, Benqing Guo, Huifen Wang, Haishi Wang. 133-137 [doi]
• An Energy Efficient 7.59-ENOB 50 MS/s Flash-SAR ADC in 65-nm CMOSSanghyun Lee, Youngmin Kim. 138-141 [doi]
• Very Compact Temperature Sensor for Power/Thermal ManagementBryce Gadogbe, Ruohang Yang, Kwabena Oppong Banahene, Pallavi Ebenezer, Randall L. Geiger, Degang Chen 0001. 142-146 [doi]
• Electrical and Physical Evaluation of Logic Network Generation Methods for SCCGJair Pérez Ramírez, Carlos Silva Cárdenas. 147-151 [doi]
• A 250pA, Gate-Leakage Based Trimming Free Current Reference, from -55°C to 150°C for Lower Power IoT ApplicationsAbhinav Vajrala, Dheekshith Akula, Arnab Dey, Khanh M. Le, Zia Abbas. 152-156 [doi]
• A +0.35 °C / -0.22 °C Inaccuracy CMOS-Based Temperature Sensor for IoT ApplicationsYanhan Zeng, Jie Cheng, Jianhua Chen, Wenjian Huang. 157-161 [doi]
• Low-Power Mixed-Signal System for Processing Electric Network Frequency in IoT DevicesCharana Sonnadara, Mudi Zhang, Min Wu, Sahil Shah. 162-166 [doi]
• A Single-Event Transient (SET) Tolerant Dynamic Bias Comparator in 65-nm CMOSAndrew Ash, John Hu. 167-171 [doi]
• A 1-1.7 GHz Cryogenic Fractional-N CP-PLL for Quantum Computing ApplicationsWenqiang Huang, Yanshu Guo, Yaoyu Li, Zhihua Wang 0001, Yuanjin Zheng, Tiefu Li, Hanjun Jiang, Wen Jia. 172-176 [doi]
• An Oscillator with Inductively Coupled Resonators for Readout of Stretchable Resistive Strain SensorBilly Mårtensson, Hinata Mitomo, Baktash Behmanesh, Naoji Matsuhisa, Hiroki Ishikuro. 177-181 [doi]
• Three-dimensional Environmentally Sustainable Neuromorphic Computing System Based on Natural Organic MemristorJinhui Wang, Feng Zhao, Mohammed Rafeeq Khan, Md. Mehedi Hasan Tanim, Zoe Templin. 182-186 [doi]
• Efficient and Scalable MIV-Transistor with Extended Gate in Monolithic 3D IntegrationMadhava Sarma Vemuri, Umamaheswara Rao Tida. 187-191 [doi]
• Detection of Counterfeit Accelerometer ICs Using Clustering and Unsupervised Machine Learning of Allan VarianceLeonard MacEachern. 192-195 [doi]
• A Low-Cost Inkjet-Printed Heart Sound Sensor for Telehealth ApplicationMuklasur R. Opu, Steven D. Gardner, Mohammad Rafiqul Haider. 197-201 [doi]
• Design Space Exploration in the Physical-Design of an AI-Processor at 12 nm Using Relative-Placement MethodologyMohit Sharma, Pavel Sinha, Doni Dattani, Mohammed Khalid. 202-206 [doi]
• Dynamic MAC Unit Pruning Techniques in Runtime RTL Simulation for Area-Accuracy Efficient Implementation of Neural Network AcceleratorJisu Kwon, Heuijee Yun, Daejin Park. 207-211 [doi]
• Challenges on Design and Technology Co-Optimization: Design Automation PerspectiveTaewhan Kim. 212-216 [doi]
• Challenge-Response Pair Space Enhancement for Imager-Based Physically Unclonable FunctionsMd. Sakibur Sajal, Marc Dandin. 217-221 [doi]
• Schmitt-Trigger Based Physically Unclonable Function with Variable VtSesibhushana Rao Bommana, Srihari Veeramachaneni, Srinivas MB. 222-226 [doi]
• SRAM Vmin Scaling via Negative WordlineAnoop Gopinath, Trond Ytterdal, Avinash Yadav, John J. Lee 0001, Maher E. Rizkalla, Mukesh Kumar. 227-231 [doi]
• FPGA-Based Hardware-in-the-Loop Real-Time Simulation ImplementationFarshideh Kordi, Christian Barnard, Paul Fortier, Amine Miled 0001. 232-235 [doi]
• Doubly-Block Circulant Kernel Matrix Exploitation in Convolutional AcceleratorsLucas Ferreira, Steffen Malkowsky, Patrik Persson, Kalle Åström, Liang Liu 0002. 236-240 [doi]
• A 99.6 % Duty Cycle High-Resolution DPWM Using Reconfiguring DecoderVenkata Naveen Kolakaluri, Oliver Lexter July A. Jose, Chua-Chin Wang. 241-244 [doi]
• A New Power Efficient, Wide-Range PWM-Based MPPT Circuit for Ultra-Low Power Energy HarvestersMostafa Abedi, Aatmesh Shrivastava. 245-249 [doi]
• Variable Clock Frequency for Incremental Conductance MPPT PerformanceMuhammad Ulum Burhani, Jayandi Soriasi Panggabean, Trio Adiono, Infall Syafalni, Nana Sutisna. 250-254 [doi]
• Spur-Free Switch-Mode Power SuppliesTanner Tengberg, Hua Zhang, Ayman A. Fayed. 255-258 [doi]
• RF Energy Harvester with Constant Off-Time Charger for Batteryless DevicesMahmoud Gshash, Vishak Narayanan, Henry Duwe, Nathan M. Neihart. 259-263 [doi]
• A Baseline Comparison of Linear and Exponential Charge PumpsMasoud Askariraad, Stefano Gregori. 264-268 [doi]
• Design of an Error-Tolerant Nonvolatile Register for Energy-Aware Intermittent ComputingKaede Sakai, Masanori Natsui, Takahiro Hanyu. 269-273 [doi]
• Predictive Storage Management for Cloud-Based Video Streaming Using ML ARIMA ModelMahmoud Darwich, Kasem Khalil, Yasser Ismail, Magdy A. Bayoumi. 274-278 [doi]
• On the Trustworthiness of FHIR-Based Intemet-of-Things Digital Health SystemsTia Pope, Ahmad Patooghy, Abdolhossein Sarrafzadeh. 279-283 [doi]
• A Method for Measuring Liquid Weight Using a Hilbert TransformerJun Obara, Naoyuki Aikawa. 284-287 [doi]
• Flexible EEG Headband with Artifact Reduction and Continuous Electrode Skin Impedance Monitoring for Neurological DisordersMuhammad Sheeraz, Atif Innayat, Muhammad Usman Nadeem, Carson Failor, Nadeem Ahmad Khan, Wala Saadeh, Muhammad Awais Bin Altaf. 288-292 [doi]
• Long-Term Performance Evaluation of Microfluidic Check Valves Using a Flow Control SetupYuna Jung, Daniel W. Gulick, Jennifer Blain Christen. 293-297 [doi]
• Artifacts Removal Techniques for the European iEEG DatasetShiva Maleki Varnosfaderani, Ian McNulty, Nabil J. Sarhan, Mohammad Alhawari. 298-302 [doi]
• Practical Implementation of Instantaneous Frequency Mass SpectrometrySasha Smith, Steven Sandoval, Tanner Schaub, Phillip L. De Leon. 303-307 [doi]
• A Very Sensitive NO2 Gas Monitoring System Based on MoS2 NanosheetYou Zhou, Sheng Wang, Sichen Xin, Yuhang Wang, Zhenyu Li, Mona E. Zaghloul. 308-311 [doi]
• Sensor Fusion Image Processing for Autonomous Robot BlimpsAaron Mendoza, Andrew Lovelace, Steven Potter, Scott Koziol. 312-316 [doi]
• Spectral Responsivity and Photoresponse Non-Uniformity of a Perimeter-Gated Single-Photon Avalanche Diode ImagerFahimeh Dehghandehnavi, Md. Sakibur Sajal, Kai-Chun Lin, Marc Dandin. 317-321 [doi]
• A Low Cost Physical Stimulus Emulator for Motion and Pressure SensorsIshaan Bassi, Sule Ozev. 322-325 [doi]
• Analytical Array-Level Comparison of Read/Write Performance Between Voltage Controlled-MRAM and STT-MRAMHaris Suhail, Jiyue Yang, Haoran He, Kang L. Wang, Sudhakar Pamarti. 326-330 [doi]
• Quantum Anomalous Hall Effect-Based Variation Robust Binary Content Addressable MemoryMd. Mazharul Islam 0006, Jack Hutchins, Shamiul Alam, Md. Shafayat Hossain, Akhilesh Jaiswal 0001, Ahmedullah Aziz. 331-335 [doi]
• A Reconfigurable Monolithic 3D Switched-Capacitor DC-DC Converter with Back-End-of-Line Oxide Channel TransistorJungyoun Kwak, Wantong Li, Shimeng Yu. 336-340 [doi]
• A Fully Passive Selectorless ReRAM ArrayAbdulaziz Alshaya, Adil Malik, Andrea Mifsud, Christos Papavassiliou. 341-345 [doi]
• Hardware Implementation of Digital Memcomputing on Small-Size FPGAsDyk Chung Nguyen, Yuan-Hang Zhang, Massimiliano Di Ventra, Yuriy V. Pershin. 346-350 [doi]
• Tidal Current Fundamental Frequency Determination Algorithm for Integer Arithmetic UnitsJuan Montiel-Caminos, Javier Sosa, Juan A. Montiel-Nelson. 351-354 [doi]
• Energy-Efficient Unified Multi-Hash Coprocessor for Securing IoT Systems Integrating BlockchainPham Hoai Luan, Thi Sang Duong, Vu Trung Duong Le, Thi Hong Tran, Yasuhiko Nakashima. 355-359 [doi]
• A RISC-V Instruction Set Extension for Flexible Hardware/Software Protection of Cryptosystems Masked at High OrdersFabrice Lozachmeur, Arnaud Tisserand. 360-364 [doi]
• Design of a 15-Bit 160-MS/s Sigma-Delta DAC for BIST Generation in Automotive RADAR SystemsPablo Cruz-Dato, Miguel Chanca-Martín, José M. de la Rosa. 365-369 [doi]
• Feedback Stochastic ADCTakashi Miki. 370-374 [doi]
• A Highly Multi-Bit Continuous-Time Delta-Sigma Modulator ADC with 9-Bit FeedbackJun-Yi Wu, Hsin-Shu Chen. 375-379 [doi]
• Quadrature Control-Bounded ADCsHampus Malmberg, Fredrik Feyling, José M. de la Rosa 0001. 380-384 [doi]
• Memorial Contributions of Graham Jullien to Emerging Residue Number System Technologies During the Evolution of Digital Signal Processing and Computer ArithmeticW. Kenneth Jenkins. 385-388 [doi]
• Design and Implementation of Full Adder Circuit Based on VTM-Logic GatesFarzad Mozafari, Majid Ahmadi, Arash Ahmadi. 389-393 [doi]
• Wheeled Mobile Robot Modeling for Local Navigation Using System IdentificationCheng-Lung Lee, Mark J. Paulik, Mohan Krishnan 0001. 394-398 [doi]
• High-Efficiency Wideband Envelope-Tracking Power Amplifier Module with GaN PA for 5G NR Base-Station ApplicationsChin Hsia. 399-403 [doi]
• Salvaging Gate-Drive Power in Switched Power SuppliesGuillaume Guérin, Gabriel A. Rincón-Mora. 404-408 [doi]
• Maximum Power-Point Theory For Thermoelectric HarvestersXi Li, Gabriel A. Rincón-Mora. 409-413 [doi]
• An Efficient Switched Capacitor DC-DC Converter for Body Heat Energy HarvestingLinran Zhao, Yaoyao Jia. 414-418 [doi]
• Maximum DC-DC Conversion in Switched-Inductor Power SuppliesQiwei Chen, Gabriel A. Rincón-Mora. 419-423 [doi]
• Invited: An Active Filter Balun and Frequency Doubler for Parametric Phase Noise Reduction SystemsThomas Gourousis, Mengting Yan, Hussein M. E. Hussein, Cristian Cassella, Matteo Rinaldi, Marvin Onabajo. 424-428 [doi]
• On Body Characterization of Flexible Electrodes for Human-Body CommunicationAmr N. Abdelrahman, David Lago-Cachón, Mohammed E. Fouda, Ahmed M. Eltawil. 429-433 [doi]
• A Planar Coil Design Using Deep LearningAli Nezaratizadeh, Sultan Mahmud, Adam Khalifa. 434-438 [doi]
• Invited: Ring-Oscillator Physical Unclonable Function (RO-PUF) Based PRBS Generation as a Device Signature in Distributed Brain ImplantsOvishake Sen, Baibhab Chatterjee. 439-443 [doi]
• Invited: IoB: The Vision of the Internet of BodiesArunashish Datta, Shreyas Sen. 444-448 [doi]
• Toward Biorealistic Silicon Neural Circuits on Reconfigurable PlatformsSwagat Bhattacharyya, Pranav O. Mathews, Praveen Raj Ayyappan, Jennifer O. Hasler. 449-453 [doi]
• Efficient Implementation of a Fully Analog Neural Network on a Reconfigurable PlatformAfolabi Ige, Jennifer Hasler. 454-457 [doi]
• Autoencoder-Based Features Extraction for the Health Monitoring in the Space domainSilvia Onofri, Andriy Enttsel, Livia Manovi, Alex Marchioni, Salvatore Cognetta, Francesco Corallo, Carlo Ciancarelli, Mauro Mangia, Riccardo Rovatti, Gianluca Setti. 458-462 [doi]
• Spike-Timing-Dependent Plasticity for a Hafnium-Oxide Memristive SynapseNishith N. Chakraborty, Hritom Das, Garrett S. Rose. 463-467 [doi]
• A Cyclic Vernier Digital-to-Time Converter for Time-Mode Successive Approximation TDCDaniel Junehee Lee, Fei Yuan 0005, Yushi Zhou. 468-471 [doi]
• A 3.97 µW 11.2b 500 kS/s Hybrid SAR ADC via Time-Mode Signal ProcessingIan Perczak, Fei Yuan. 472-476 [doi]
• Small Area, High Accuracy Sub-Radix Resistive Current Mode Digital-To-Analog Converter with Novel Calibration AlgorithmIsaac Bruce, Michael Sekyere, Emmanuel Nti Darko, Ekaniyere Oko-Odion, Kushagra Bhatheja, Degang Chen 0001. 477-481 [doi]
• A Fully Synthesizable Dynamic Voltage Comparator with Time-Domain Offset CalibrationShunyan Wang, Yuekang Guo, Qiang Pan, Xiaoming Liu 0008, Shan Wang, Jing Jin 0005. 482-485 [doi]
• Extrema-Triggered Analog-Digital Conversion for Low-Power Wireless Sensor NodesSwagat Bhattacharyya, Jennifer O. Hasler. 486-490 [doi]
• AutoHLS: Learning to Accelerate Design Space Exploration for HLS DesignsMd Rubel Ahmed, Toshiaki Koike-Akino, Kieran Parsons, Ye Wang 0001. 491-495 [doi]
• System-on-Chip Message Flow Mining with Masked-Language ModelsMd Rubel Ahmed, Bardia Nadimi, Hao Zheng 0001. 496-500 [doi]
• An Energy Efficient Sorting Architecture with Cell-Gating for Top-K Sorting on FPGAJaehyeon So, YongSoo Kim, Chanwook Hwang, Jong Hwan Ko. 501-505 [doi]
• Novel Fence Generation Methods for Accelerating Reconfigurable Exact SynthesisLiuting Shang, Sheng Lu, Sungyong Jung, Chenyun Pan. 506-510 [doi]
• RELUT-GNN: Reverse Engineering Data Path Elements From LUT Netlists Using Graph Neural NetworksKishore Pula, Aparajithan Nathamuni Venkatesan, Ram Venkat Narayanan, Sundarakumar Muthukumaran, Ranga Vemuri, John Marty Emmert. 511-515 [doi]
• Hessian-Based Parameter Quantization Method for BERTWoohong Byun, Saibal Mukhopadhyay. 516-520 [doi]
• EARB: An Edge-Assisted Residual Block for Image RetrievalFarzad Sabahi, M. Omair Ahmad, M. N. S. Swamy. 521-525 [doi]
• A Hierarchical Communication Algorithm for Distributed Deep Learning TrainingJiayu Zhang, Shaojun Cheng, Feng Dong, Ke Chen, Yong Qiao, Zhigang Mao, Jianfei Jiang 0001. 526-530 [doi]
• QuickNN: Python Toolbox for Training and Optimizing ANN for Hardware ImplementationKhaled Humood, Alexander Serb, Shiwei Wang, Themis Prodromakis. 531-535 [doi]
• In-Memory-Computing (IMC) Technique in Local Difference Decision Block of an On-Board Satellite Hyperspectral Data Compression AlgorithmVijay Joshi, Sheeba J. Rani. 536-540 [doi]
• A 64Gbps 1.36 Vppd 1.44pJ/b Fully CMOS-Style Transmitter with Active Hybrid Driver in 28nm CMOSDa Fu, DanYu Wu, Xuan Guo, Hanbo Jia, Jie Fu, Shan Lu, Xinyu Liu. 541-545 [doi]
• Power and Memory Efficient High-Speed RL Based Run time Power Manager for Edge ComputationRatnala Vinay, Kartik Laad, Chandrajit Pal, Pradip Sasmal, Toshihisa Haraki, Chirag Juyal, Mohamed Amir Gabir Elbakri, Amit Acharyya. 546-550 [doi]
• Digital Twin Based Fault-Tolerance Framework for RRAM Based Neural Computing SystemsChandrasekhara Srinivas Vatti, Y. V. Sai Dinesh, Anagha Nimbekar, Amit Acharyya. 551-555 [doi]
• Granular Transistor-Level Approaches for QDI Asynchronous Crossbar SwitchesShahzad Haider, Song Chen 0001. 556-560 [doi]
• FORSA: Exploiting Filter Ordering to Reduce Switching Activity for Low Power CNNsYasmin Halawani, Huruy Tekle Tefai, Baker Mohammad, Hani H. Saleh. 561-565 [doi]
• Energy-Efficient Pose-Estimation FPGA-Accelerator for Real-Time Mobile V-SLAM RobotCheng Nian, Weiyi Zhang, Liting Niu, Yiyang Wang, Chaoyang Ding, Fei Shao, Chun Zhang. 566-570 [doi]
• Wireless Sensor Node System to Monitor Pig Activities for Behavior ClassificationBrandon Cheung, Yuezhong Xu, Dong Sam Ha. 571-575 [doi]
• Design of a Sensor Network for Deep-Water Current Monitoring in Aquaculture FacilitiesNieves G. Hernandez-Gonzalez, Juan Montiel-Caminos, Javier Sosa, Juan A. Montiel-Nelson. 576-579 [doi]
• A Single Camera Vision-Based Pose Tracking and Control SystemHunter Stuckey, Nicholas Grijalva, Luis Rodolfo García Carrillo, Wei Tang. 580-584 [doi]
• A Custom ASIC for Impedance Sensing SystemsAndalib Nizam, Shaghayegh Aslanzadeh, Jaime Campos, Bathiya Senevirathna, Pamela Abshire, Brian Thompson, Abhishek Motayed, Nicole McFarlane. 585-589 [doi]
• SPAD Based CMOS Monolithic PPG SensorShante Hicks, Sajid Hasan, Mst Shamim Ara Shawkat. 590-593 [doi]
• A Compact and Accurate MOS-based Temperature Sensor for Thermal ManagementRuohan Yang, Bryce Gadogbe, Randall L. Geiger, Degang Chen 0001. 594-598 [doi]
• A 15μW Low Cost CMOS Smart Temperature SensorBryce Gadogbe, Randall L. Geiger. 599-603 [doi]
• Ultra-Small Area, Highly Linear Sub-Radix R-2R Digital-To-Analog Converters with Novel Calibration AlgorithmMichael Sekyere, Emmanuel Nti Darko, Isaac Bruce, Ekaniyere Oko-Odion, Kushagra Bhatheja, Degang Chen 0001. 604-608 [doi]
• A Non-Linearity Digital Background Calibration Algorithm with Piece-Wise Linear FunctionsKe Wu, Yuekang Guo, Xiaoming Liu 0008, Jing Jin 0005, Howard C. Yang, Jianjun Zhou. 609-613 [doi]
• Reference Clock Jitter Immunity by Accurate DPLL Bandwidth Control in a Multiple-link Die-to-Die InterfacePing Lu, Bupesh Pandita, Minhan Chen. 614-618 [doi]
• Mismatch Driven Systematic Design Methodology for Transistor Based Active ResistorsAndreas Tsiougkos, Alkis Hatzopoulos, Vasilis F. Pavlidis. 619-623 [doi]
• A High-Speed Comparator Using a New Regeneration LatchHamid Karrari, Pietro Andreani, Siyu Tan. 624-628 [doi]
• Multiply-And-Max/min Neurons at the Edge: Pruned Autoencoder ImplementationPhilippe Bich, Luciano Prono, Mauro Mangia, Fabio Pareschi, Riccardo Rovatti, Gianluca Setti. 629-633 [doi]
• A Novel Approach for PV Cell Fault Detection Using YOLOv8 and Particle Swarm OptimizationQuoc Bao Phan, Tuy Tan Nguyen. 634-638 [doi]
• Integrating Gstreamer with Xilinx's ZCU 104 Edge Platform for Real-Time Intelligent Image EnhancementJonathan J. Sanderson, Syed Rafay Hasan, Besma Roui-Abidi, Mongi Abidi. 639-643 [doi]
• Spike-Driven Synaptic Plasticity for a Memristive Neuromorphic CoreNishith N. Chakraborty, Hritom Das, Garrett S. Rose. 644-648 [doi]
• Q-Learning Algorithm with Double-Agent Reinforcement Learning for Smart Traffic ControllerJalu Reswara, Nana Sutisna, Infall Syafalni, Trio Adiono. 649-653 [doi]
• Analysis of Dual-Row and Dual-Array Crossbars in Mixed Signal Deep Neural NetworksMelvin D. Edwards, Nabil J. Sarhan, Mohammad Alhawari. 654-658 [doi]
• Investigating R(t) Functions for Spike-Timing-Dependent Plasticity in Memristive Neural NetworksFarhana Afrin, Kurtis D. Cantley. 659-663 [doi]
• A Digitally Configurable Outphasing Switched-Capacitor-Based RF TransmitterAjmal Vadakkan Kayyil, Bo Qiao 0005, David J. Allstot. 664-668 [doi]
• RF Power Amplifier Control System with Dynamic Load ConditionsT. Walpita, M. N. Mahmoud, Abdullah Eroglu. 674-678 [doi]
• Design and Analysis of Low Power 20 GHz Colpitts VCO with FoM of 196.26 dBc/HzSrayan Sankar Chatterjee, Arpit Sahni, Harikrishna Kambham, Zia Abbas, Abhishek Srivastava 0002. 679-683 [doi]
• A 60 GHz and 2.08 mW Active Quasi-Circulator in 22 nm FDSOI TechnologySujan Chowdhury, Arindom Chakraborty, Upal barna Joy, Abrar Fahim, Muhtasim Alam Chowdhury, Mehedi Hasan. 684-688 [doi]
• A Linear Ratioed Impedance and Driver-Based True Full-Duplex IO with Background Self-Interference CancellationGanpat Anant Parulekar, Sandeep Goyal, Nikhil Ajith, Ishan Mishra, Shalabh Gupta. 689-693 [doi]
• Multi-Probability Hash-based Random Number Generator for Post-Quantum CryptographyAobo Li, Jiahao Lu, Dongsheng Liu, Ang Hu, Xiang Li, Shuo Yang, Tianze Huang. 694-697 [doi]
• A Hardware-in-the-Loop Simulator for mmWave Massive MIMO Using PYNQ FrameworkSijia Cheng, Ozan Alp Topal, Mustafa Ozger, Cicek Cavdar, Ove Edfors, Liang Liu 0002. 698-702 [doi]
• Privacy-Preserving and Hardware Acceleration-Based Authentication Scheme for Data Collection in E-Health ApplicationsKasem Khalil, Ahmed B. T. Sherif, Mohammad M. R. Khan Mamun, Mohamed Elsersy, Ahmad Abdel-Aliem Imam, Muhammad Hataba, Mohamed Mahmoud. 703-707 [doi]
• Randomized Bulk-Voltages: A Countermeasure to Mask Side-Channel Leakage of CMOS Logic GatesMagnus Amble, Snorre Aunet, Dag T. Wisland, Kristian Gjertsen Kjelgård. 708-712 [doi]
• Time-Based Optical Receiver Featuring a Linear Current-to-Time Conversion with EqualizationMohamed Ahmed, Tawfiq Musah. 713-717 [doi]
• A 2-$\mu\mathrm{W}$, 0.64-$\mu\text{Vrms}$ ECG Recording Chopper Amplifier with Digital-Current DSLYanhan Zeng, Yongsen Chen, Yuchen Bao, Weijian Chen 0003. 718-722 [doi]
• Preliminary Testing of Minimally Invasive pH and Carbon Dioxide Sensors for Infant MonitoringKarl Ernsberger, Daniel W. Gulick, Sritharini Radhakrishnan, Ahmed al Sultani, Ian Akamine, Mark I. Evans, Jennifer Blain Christen. 723-727 [doi]
• Field Uniformity Optimization for Integrated Capacitance Sensing of Tumor Treating Field-Treated Cancer Cell CulturesYann Gilpin, Joseph Yankel, Marc Dandin. 728-732 [doi]
• Biologically Plausible Learning on Neuromorphic Hardware ArchitecturesChristopher Wolters, Brady Taylor, Edward Hanson, Xiaoxuan Yang, Ulf Schlichtmann, Yiran Chen 0001. 733-737 [doi]
• Homeostatic Plasticity in a Leaky Integrate and Fire Neuron Using Tunable LeakNishith N. Chakraborty, Hritom Das, Garrett S. Rose. 738-742 [doi]
• Review of Hardware Implementation of SNNMst Shamim Ara Shawkat, Sajid Hasan. 743-747 [doi]
• Synaptic Scaling and Optimal Bias Adjustments for Power Reduction in Neuromorphic SystemsCory E. Merkel. 748-752 [doi]
• A Resistive Sensor Interface IC with Inductively Coupled Wireless Energy Harvesting and Data Telemetry for Implantable Pressure SensingZehua Lan, Jiahua Shi, Yaoyu Li, Jiayue Hao, Yanshu Guo, Zhihua Wang 0001, Hanjun Jiang, Wen Jia. 753-757 [doi]
• Cardiac Arrhythmias Classification Using Machine Learning and Single-Lead ECGMuhammad Ali Nauman, Carson Failor, Wala Saadeh. 758-762 [doi]
• A 128-ch Neurochemical Microchip with Highly-Scalable Low-Noise Resistive Feedback AmplifiersKevin A. White, Jinwoo Park, Brian N. Kim. 763-767 [doi]
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• A 1.5 mW, 28 GHz Noise-Cancelling LNA in 65-nm CMOSAbdullah Kurtoglu, Hossein Miri Lavasani. 778-782 [doi]
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• Optimization of DCO Using Latch-Based Varactor Cells for a Cell-Based PLLYi-Sheng Wang, Hsiang-Kai Teng, Shi-Yu Huang. 792-796 [doi]
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• Bottlenecks in Secure Adoption of Deep Neural Networks in Safety-Critical ApplicationsSanjay Das, Shamik Kundu, Kanad Basu. 801-805 [doi]
• Integrated Photonic AI Accelerators Under Hardware Security Attacks: Impacts and CountermeasuresFelipe Gohring de Magalhaes, Mahdi Nikdast, Gabriela Nicolescu. 806-810 [doi]
• Hardware-Optimized Hyperdimensional Computing for Real-Time LearningHanning Chen, Hamza Errahmouni Barkam, Mohsen Imani. 811-815 [doi]
• Security of Hardware Generators: Enabling Assurance in High-Level SynthesisMd Rafid Muttaki, Zahin Ibnat, Shang Shi, Hadi Mardani Kamali, Farimah Farahmandi. 816-820 [doi]
• Securing AI Hardware: Challenges in Detecting and Mitigating Hardware Trojans in ML AcceleratorsKevin Immanuel Gubbi, Inderpreet Kaur, Abdallah Hashem, Sai Manoj P. D., Houman Homayoun, Avesta Sasan, Soheil Salehi. 821-825 [doi]
• Adaptive Fault Tolerance Inherently Included in Bio-Inspired Adaptive Digital FilteringWilliam K. Jenkins, C. Radhakrishnan. 826-830 [doi]
• American Multinomial Option Pricing on FPGA using OneAPIAidan O'Mahony, Gil Zeidan, Bernard Hanzon, Emanuel M. Popovici. 831-835 [doi]
• FPGA Implementation of Dehazing Model Based Low-Light Image Enhancement AlgorithmBharat Bhushan Upadhyay, Kishor Prabhakar Sarawadekar. 836-840 [doi]
• Practical Markov Chain and Von Neumann based Post-processing Circuits for True Random Number GeneratorsRuilin Zhang, Haochen Zhang, Xingyu Wang, Ziyang Ye, Kunyang Liu, Hirofumi Shinohara. 841-845 [doi]
• Low Voltage CMOS Class AB Current Mirror/Precision RectifierAnindita Paul, Jaime Ramírez-Angulo, Manaswini Gangineni, Jesus Huerta-Chua. 846-849 [doi]
• An Architectural Framework for On-Line Health Monitoring of Integrated CircuitsKushagra Bhatheja, Degang Chen 0001. 850-854 [doi]
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• A High-PSR Wide-Load Capacitor-Less LDO with Back-Gate Control Technique in 22-nm FD-SOIAlper Kurt, Muhammed Mustafa Kizmaz, Ahmet Tekin. 860-864 [doi]
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• Modeling of Bias-Dependent Single Event Transients for Circuit Sensitivity CalculationChandru Ramamurthy, Zachary Giorno, Marek Turowski, Esko Mikkola. 870-874 [doi]
• Pulsed ToF LiDAR-Based Depth Imaging: SPAD Circuit Considerations and Simulation StudyUtku Noyan, Sheung Lu, Abdullah Al-Shabili, Marc Dandin, Stanley H. Chan, Pamela Abshire. 875-879 [doi]
• Ultra-low $I_{Q}$ Fully Integrated NMOS LDO with Enhanced Load Regulation and Startup for RF Energy Harvesting SensorsPuYang Zheng, Xiao Sha, Dyumaan Arvind, Yang Xie, Milutin Stanacevic. 885-889 [doi]
• Dynamic Averager Based Sub-1V Bandgap Voltage ReferenceRakesh Kumar Palani, Rajasekhar Nagulapalli, Srikar Bhagavatula. 890-894 [doi]
• A 28GHz Low Jitter, Low Power Fully Differential Self-Biased Clock Buffer with Embedded Low Pass Filter Utilizing Enable Switch in 16nm FinFETShun Nagata, Ewout Martens, Adam Cooman, Jan Craninckx. 895-899 [doi]
• Investigating a Quantum Cloud Paradigm with Quantum Neural NetworksMaxwell Yarter, Glen S. Uehara, Andreas Spanias. 900-903 [doi]
• Design of a Tunable Astrocyte Neuromorphic Circuitry with Adaptable Fault ToleranceM. Lakshmi Varshika, Sarah Johari, Jayanth Dubey, Anup Das 0001. 904-908 [doi]
• A 701.7 TOPS/W Time-Domain Spiking Neural Network Compute-in-Memory Processor with 9T1C BitcellKeonhee Park, Hoichang Jeong, KyuHo Lee. 909-913 [doi]
• A Tunable Morris-Lecar Spiking Neuron in CMOSJack Ou, Pietro M. Ferreira. 914-917 [doi]
• Energy Efficient and High-Performance Synaptic Operating Point Evaluation for SNN ApplicationsNishith N. Chakraborty, SNB Tushar, Hritom Das, Garrett S. Rose. 918-922 [doi]
• Efficient PAPR Reduction for Discrete Multi-Tone Signalling in High-Speed Wireline ApplicationsJeremy Cosson-Martin, Miad Laghaei, Hossein Shakiba, Ali Sheikholeslami. 924-928 [doi]
• A Sub-Sampling Phase Detector for Low-Power PAM4 Clock Recovery CircuitAlok Kumar, Shalabh Gupta. 929-932 [doi]
• Design and Implementation of Certificateless Cryptography for IoT ApplicationsNeam Fares, Bo Wang, Spiridon Bakiras. 933-937 [doi]
• Channel Modeling and Characterization of EQS Capacitive Coupling Human Body CommunicationQi Huang 0002, Abdelhay Ali, Abdulkadir Celik, Ahmed M. Eltawil. 938-942 [doi]
• Denoising Method for NMR Signals Based on Two Domain Sparse RepresentationSatoru Kubota, Kazunori Uruma, Toshihiro Furukawa, Hiroyuki Yashima. 943-946 [doi]
• A pH Sensing System with Security Enhanced Cryptographic SystemMohammad Farhan, Atik Yasir Rahman, Nicole McFarlane. 947-951 [doi]
• Single Photon LiDAR Compression: An OverviewAbdullah H. Al-Shabili, Hashan K. Weerasooriya, Harshana Weligampola, Prateek Chennuri, Pamela Abshire, Stanley Chan. 952-956 [doi]
• Many-Core Display Stream Compression Decoders With Simplified Pixel PredictionShifu Wu, Bevan M. Baas. 957-961 [doi]
• LTM-GAN: A Light-Weight Generative Adversarial Net for Tone MappingDi Li, Susanto Rahardja. 962-966 [doi]
• A Floating-Point 16 × 16 SVD Accelerator for Beyond-5G Large Intelligent SurfacesMohammad Attari, Jesús Rodríguez Sánchez, Liang Liu 0002. 967-971 [doi]
• Energy-Efficient High-Speed Architecture for Vehicle Speed Prediction Using MicrocontrollersMohammed Rafi Shaik, Dubacharla Gyaneshwar, Dheeraj Chellu, Shikari Sriker, Pabitra Das, Karthikeyan Mohanraj, Tejas Arya, Amit Acharyya. 972-976 [doi]
• Hardware-Efficient Accurate and Approximate FPGA Multipliers for Error-Tolerant ApplicationsHaonan Wang, Ke Chen 0018, Chenggang Yan 0002, Bi-Wu, Weiqiang Liu 0001. 977-981 [doi]
• A High Accuracy and Hardware Efficient Adaptive Filter Design with Approximate ComputingWenzhuo Xie, Chenggang Yan 0002, Hanghang Wang, Ke Chen 0018, Bi-Wu, Chenghua Wang, Weiqiang Liu 0001. 982-986 [doi]
• A 400-MS/s 10-Bit SAR-Assisted Two-Step Digital-Slope ADCHao Deng 0003, Runxi Zhang, Jinghong Chen. 987-990 [doi]
• Common-Mode Drift Resilient Ring-Oscillator-Based Time-Domain Filter for Next-Generation WirelessQiuyan Xu, Chung-Ching Lin, Huan Hu, Subhanshu Gupta. 991-995 [doi]
• A VCO Linearization Technique Using Dual-VCO and Interpolation for Time-Based ADCsShea Smith, Armin Tajalli, Shiuh-Hua Wood Chiang. 996-1000 [doi]
• A Technique to Increase the Linearity of the Bootstrapped SwitchHamid Karrari, Pietro Andreani, Siyu Tan. 1001-1004 [doi]
• An 8-GHz Octa-Phase Clock Corrector with Phase and Duty-Cycle Correction in 40-nm CMOSJung-Woo Sull, Minkyo Shim, Jung Hun Park, SangHee Lee, Deog Kyoon Jeong. 1005-1009 [doi]
• Optimization of CMOS Voltage Reference with Blended Distribution Estimation Based on Parameter Evolutionary AlgorithmsYanhan Zeng, Chenglin Li, Xiaofei Yu, Yanshen Luo, Jiahui Zhao, Jintao Li. 1010-1014 [doi]
• Evaluation of a Primary-Side Parameters-Agnostic Power Regulation Method on Different WPT TopologiesAndrea Celentano, Carmine Paolino, Fabio Pareschi, Riccardo Rovatti, Gianluca Setti. 1015-1019 [doi]
• Structured Pruning in Deep Neural Networks with Trainable Probability MasksFilippo Martinini, Andriy Enttsel, Alex Marchioni, Mauro Mangia, Riccardo Rovatti, Gianluca Setti. 1020-1024 [doi]
• AI-Enhanced Codesign of Neuromorphic CircuitsDouglas Cale Crowder, J. Darby Smith, Suma George Cardwell. 1025-1029 [doi]
• Hardware-Friendly Block Variable-Length Sampling Pruning for Graph Neural NetworksJing Zhang, Gengsheng Chen, Lingyun Ke, Luchang Ding, Xin Fan, Zehao Wu, Lei Shen, Chang Cai. 1030-1034 [doi]
• Design Space Exploration Tool for Mixed-Signal Spiking Neural NetworkSayma Nowshin Chowdhury, Sahil Shah. 1035-1039 [doi]
• A Hardware-friendly Quantization and Model Fine Tuning with STEBC for Object DetectionChia-Chi Tsai. 1040-1044 [doi]
• Behavior Analysis of the Binary Hyperbolic Tangent (Btanh) AlgorithmSeth Shively, Eugene Chabot, John DiCecco, Scott Koziol. 1045-1049 [doi]
• Targeted Background Removal Creates Interpretable Feature VisualizationsIan E. Nielsen, Erik Grundeland, Joseph Snedeker, Ravi Prakash Ramachandran, Ghulam Rasool 0001. 1050-1054 [doi]
• Indoor Localization System Based on Bluetooth Low Energy Beacons and Spiking Neural NetworksBaejah, Nur Ahmadi, Trio Adiono. 1055-1059 [doi]
• SpectroNet: A Low Complexity CNN-LSTM Architecture for Keyword Spotting ApplicationClarence Amadeus, Infall Syafalni, Nana Sutisna, Trio Adiono. 1060-1064 [doi]
• Applicability of Hyperdimensional Computing for Seizure Prediction Using LBP and PSD Features from iEEGLulu Ge, Keshab K. Parhi. 1065-1069 [doi]
• Vibration Frequency Detection of Stepping Motors Using a Finite-Order Hilbert Transformer by a Variable FIR Filter with Transmission ZerosTeppei Ota, Masayoshi Nakamoto, Kei Kozakai, Kohei Terashima, Naoyuki Aikawa. 1070-1074 [doi]
• Environmental Characterization of a Fluorescence Detecting Point of Care SystemVi T. Nguyen, Jennifer Blain Christen. 1075-1078 [doi]
• Flexible Textile Based Electrooculogram Wearable Eye Tracking System for Human-Machine InterfaceWenxin Zeng, Ruben Del-Rio-Ruiz, Sameer Sonkusale. 1079-1082 [doi]
• Split Manufacturing Based Secure Hardware Design by BEOL Signal Selection In High Level SynthesisHaimanti Chakraborty, Ranga Vemuri. 1083-1087 [doi]
• Benchmarking for Hardware Security: Types, Design Levels, and LimitationsNiraj Prasad Bhatta, Harshdeep Singh, Fathi H. Amsaad 0001. 1088-1092 [doi]
• Multi-Criteria Hardware Trojan Detection: A Reinforcement Learning ApproachAmin Sarihi, Peter Jamieson, Ahmad Patooghy, Abdel-Hameed A. Badawy. 1093-1097 [doi]
• Mitigation of Rowhammer Attack on DDR4 Memory: A Novel Multi-Table Frequent Element Algorithm Based ApproachSamuel Sylvester, Jonathan Sandersan, Syed Rafay Hasan. 1098-1102 [doi]
• Hybrid Shielding: Amplifying the Power of Camouflaging and Logic EncryptionNikhil Saxena, Ranga Vemuri. 1103-1107 [doi]
• Joint Software-Hardware Design for Green AIMd Rubel Ahmed, Toshiaki Koike-Akino, Kieran Parsons, Ye Wang 0001. 1108-1112 [doi]
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