Y. V. Sai Dinesh - researchr alias

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Viewing Publication 1 - 4 from 4

2023

Reconfigurable VLSI Design Architecture for Deep Learning Established Forelimb and Hindlimb Gesture Recognition for Rehabilitation ApplicationAnagha Nimbekar, Y. V. Sai Dinesh, Arvind Gautam, Vidhumouli Hunsigida, Appa Rao Nali, Amit Acharyya. access, 11:70061-70070, 2023. [doi]

Digital Twin Based Fault-Tolerance Framework for RRAM Based Neural Computing SystemsChandrasekhara Srinivas Vatti, Y. V. Sai Dinesh, Anagha Nimbekar, Amit Acharyya. mwscas 2023: 551-555 [doi]

2022

Low Complexity Reconfigurable-Scalable Architecture Design Methodology for Deep Neural Network Inference AcceleratorAnagha Nimbekar, Chandrasekhara Srinivas Vatti, Y. V. Sai Dinesh, Sunidhi Singh, Tarun Gupta, Ramesh Reddy Chandrapu, Amit Acharyya. socc 2022: 1-6 [doi]

VLSI Architecture Design Methodology for Deep learning based Upper Limb and Lower Limb Movement Classification for Rehabilitation ApplicationAnagha Nimbekar, Y. V. Sai Dinesh, Arvind Gautam, Vidhumouli Hunsigida, Appa Rao Nali, Amit Acharyya. lascas 2022: 1-4 [doi]

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