Table of Contents

• VLSI Architecture Design Methodology for Deep learning based Upper Limb and Lower Limb Movement Classification for Rehabilitation ApplicationAnagha Nimbekar, Y. V. Sai Dinesh, Arvind Gautam, Vidhumouli Hunsigida, Appa Rao Nali, Amit Acharyya. 1-4 [doi]
• A Wide-Range, High-Voltage, Floating Level Shifter with Charge Refreshing in a Standard 180 nm CMOS ProcessDavid Palomeque-Mangut, Ángel Rodríguez-Vázquez, Manuel Delgado-Restituto. 1-4 [doi]
• Sensor Systems for Smart AgricultureDiego Barrettino. 1-4 [doi]
• Voltage-to-Voltage Sigmoid Neuron Activation Function Design for Artificial Neural NetworksTatiana Moposita, Lionel Trojman, Felice Crupi, Marco Lanuzza, Andrei Vladimirescu. 1-4 [doi]
• An NML in-plane Wire Crossing StructureLaysson Oliveira Luz, José Augusto Miranda Nacif, Ricardo S. Ferreira, Omar P. Vilela Neto. 1-4 [doi]
• Atrial Fibrillation Detection Using Weight-Pruned, Log-Quantised Convolutional Neural NetworksXiu Qi Chang, Ann Feng Chew, Benjamin Chen Ming Choong, Shuhui Wang, Rui Han, Wang He, Li Xiaolin, Rajesh C. Panicker, Deepu John. 1-4 [doi]
• A Novel Single Lead to 12-Lead ECG Reconstruction Methodology Using Convolutional Neural Networks and LSTMVishnuvardhan Gundlapalle, Amit Acharyya. 1-4 [doi]
• Notch Frequency Generation Methods in Noise Spread Spectrum for Pulse Coding Switching DC-DC ConverterGui-Yi Dong, Shogo Katayama, Yifei Sun, Yasunori Kobori, Anna Kuwana, Haruo Kobayashi 0001. 1-4 [doi]
• A Fast Approximate Function Generation Method to ATMR ArchitectureGuilherme B. Manske, Clayton R. Farias, Paulo F. Butzen, Leomar S. da Rosa. 1-4 [doi]
• PPA Based CNN Architecture ExplorerMasoud Shahshahani, Dinesh Bhatia. 1-4 [doi]
• Exploring the Impacts of Multiple Kernel Sizes of Gaussian Filters Combined to Approximate Computing in Canny Edge DetectionMarcio Monteiro, Ismael Seidel, Mateus Grellert, José Luís Güntzel, Leonardo Bandeira Soares, Cristina Meinhardt. 1-4 [doi]
• Approximation-Based Implementation for a Minimum Energy Point Tracking Algorithm over a Wide Operating Performance RegionShoya Sonoda, Jun Shiomi, Hidetoshi Onodera. 1-4 [doi]
• Improved Approximate Multipliers for Single-Precision Floating-Point Hardware DesignPatrícia U. L. da Costa, Pedro Tauã Lopes Pereira, Brunno A. Abreu, Guilherme Paim, Eduardo A. C. da Costa, Sergio Bampi. 1-4 [doi]
• A 52.3% Peak Efficiency 22nm CMOS Low-Power Light-Adaptive Self-Oscillating Voltage Doubler Using Scalable Dynamic Leakage-Suppression LogicXujiaming Chen, Guowei Chen, XinYang Yu, Yue Wang, Kiichi Niitsu. 1-4 [doi]
• Calibration of Logical Effort Transistor Sizing for On-the-Fly Low-Power Supergate DesignHenrique Kessler, Murilo Bohlke, Leomar S. da Rosa, Marcelo Porto, Vinicius V. Camargo. 1-4 [doi]
• UAVs vs Satellites: Comparison of tools for water quality monitoringEnzo Pacilio, Alejo Silvarrey, Alvaro Pardo. 1-4 [doi]
• Ultra-Low-Power CMOS Voltage Reference Topologies Regarding Technology NodeFabián Olivera, Lucas Souza da Silva, Antonio Petraglia. 1-4 [doi]
• Impact of Thread Parallelism on the Soft Error Reliability of Convolution Neural NetworksGeancarlo Abich, Rafael Garibotti, Jonas Gava, Ricardo Reis 0001, Luciano Ost. 1-4 [doi]
• An integrated circuit to enable electrodeposition and amperometric readout of sensing electrodesMinghao Li, Anne Vanhoestenberghe, Sara S. Ghoreishizadeh. 1-4 [doi]
• On the Netlist Gate-level Pruning for Tree-based Machine Learning AcceleratorsBrunno A. Abreu, Guilherme Paim, Jorge Castro-Godínez, Mateus Grellert, Sergio Bampi. 1-4 [doi]
• 22nm CMOS pW Standby Power Flip-Flops with/without Security using Dynamic Leakage Suppression LogicDuong Nghiep Huy, Guowei Chen, Kiichi Niitsu. 1-4 [doi]
• A Novel Event-Based Method for ASK DemodulationAlexis Rodrigo Iga Jadue, Sylvain Engels, Laurent Fesquet. 1-4 [doi]
• DMTJ-Based Non-Volatile Ternary Content Addressable Memory for Energy-Efficient High-Performance SystemsKevin Vicuña, Luis-Miguel Prócel, Lionel Trojman, Ramiro Taco. 1-4 [doi]
• Voltage and Technology Scaling of DMTJ-based STT-MRAMs for Energy-Efficient Embedded MemoriesEsteban Garzón, Ramiro Taco, Luis-Miguel Prócel, Lionel Trojman, Marco Lanuzza. 1-4 [doi]
• SOI UTBB Capacitive Cross-Coupling Effects in Ultimate Technological NodesFernando J. Costa, Renan Trevisoli, Rodrigo Trevisoli Doria. 1-4 [doi]
• Fault-Tolerant Finite State Machine Quasi Delay Insensitive in Commercial FPGA DevicesOrlando Verducci Jr., Duarte Lopes de Oliveira, Gracieth Cavalcanti Batista. 1-4 [doi]
• 26 GHz VCO in 22 nm FDSOI Technology for RADAR ApplicationPiyush Kumar, Dario Stajic, Erkan Nevzat Isa, Linus Maurer. 1-4 [doi]
• MLSBench: A Benchmark Set for Machine Learning based FPGA HLS Design FlowsPingakshya Goswami, Masoud Shahshahani, Dinesh Bhatia. 1-4 [doi]
• An Ultra-Low Power 22 nm Self-Oscillating Voltage Doubler With Dynamic Leakage-Suppression LogicSora Kato, Guowei Chen, Kiichi Niitsu. 1-3 [doi]
• Smart devices and RFID: towards an Android-based information system in the cattle-yardsJuan Sapriza, Alfredo Arnaud, Bruno Bellini, Felipe Estévez, Matías R. Miguez. 1-4 [doi]
• Memristor-based Oscillator for Complex Chemical Wave Logic Computations: Fredkin Gate ParadigmTheodoros Panagiotis Chatzinikolaou, Iosif-Angelos Fyrigos, Vasileios G. Ntinas, Stavros Kitsios, Panagiotis Bousoulas, Michail-Antisthenis I. Tsompanas, Dimitris Tsoukalas, Andrew Adamatzky, Georgios Ch. Sirakoulis. 1-4 [doi]
• Full System Exploration of On-Chip Wireless Communication on Many-Core ArchitecturesRafael Medina, Joshua Kein, Yasir Mahmood Qureshi, Marina Zapater, Giovanni Ansaloni, David Atienza. 1-4 [doi]
• Hybrid Comparator and Window Switching Scheme for low-power SAR ADCBruno Canal, Hamilton Klimach, Sergio Bampi, Tiago R. Balen. 1-4 [doi]
• Low Power Frequency Dividers using TSPC logic in 28nm FDSOI TechnologyMd. Sazzad Hossain, Mateus Bernardino Moreira, Francois Sandrez, Francois Rivet, Hervé Lapuyade, Yann Deval. 1-4 [doi]
• Near threshold pulse transit time processor for central blood pressure estimationFrancisco Veirano, Pablo Perez-Nicoli, Nicolás Gammarano, German Fierro, Fernando Silveira. 1-4 [doi]
• A Digital Random Number Generator Based on Four Regional Examination of Double Scroll ChaosOnur Karatas, Salih Ergün. 1-4 [doi]
• Evaluating a Machine Learning-based Approach for Cache ConfigurationLucas Ribeiro, Ricardo P. Jacobi, Francisco Júnior, Jones Yudi Mori Alves da Silva, Ivan Saraiva Silva. 1-4 [doi]
• Energy-Efficient FinFET-Versus TFET-Based STT-MRAM BitcellsAriana Musello, Santiago S. Pérez, Marco Villegas, Luis-Miguel Prócel, Ramiro Taco, Lionel Trojman. 1-4 [doi]
• Validation of a Signal Acquisition for Electrochemical Noise Corrosion Monitoring SystemMarco Antonio de Campos Menezes, Tales Cleber Pimenta, Carlos Barreira Martinez. 1-4 [doi]
• Highly Linear Large Signal Compact Voltage-to-Current Converter in 28 nm FD-SOI TechnologyAndres Asprilla, Andreia Cathelin, Yann Deval. 1-4 [doi]
• Design of Asynchronous Pipelines with QDI Template Using Commercial FPGAGabriel C. Duarte, Duarte Lopes de Oliveira, Gracieth Cavalcanti Batista. 1-4 [doi]
• A Low-Cost Cold Plasma Generator Circuits Designed for Laboratory ApplicationsSergio Diaz, Johan I. Guzman, Claudio Tenreiro, Roberto O. Ramirez, Oscar Hernandez. 1-4 [doi]
• Random Number Generators Based on Metastable Behavior in Double-Scroll Chaotic AttractorsKaya Demir, Salih Ergün. 1-4 [doi]
• MAx-DNN: Multi-Level Arithmetic Approximation for Energy-Efficient DNN Hardware AcceleratorsVasileios Leon, Georgios Makris, Sotirios Xydis, Kiamal Z. Pekmestzi, Dimitrios Soudris. 1-4 [doi]
• Optimized Hardware Implementation of Vedic Binary Multiplier using Nikhilam Sutra on FPGAPalak Yash, Mansi Thakare, Babita Jajodia. 1-4 [doi]
• An IoT SoC for Agricultural ApplicationsVictor Grimblatt, Guillaume Ferré, Francois Rivet, Christophe Jégo. 1-4 [doi]
• A Highly Compact 1W Ku-Band Power AmplifierB. Coquillas, Eric Kerherve, AC. Amiaud, L. Roussel, S. Redois, B. Louis, T. Merlet, V. Petit. 1-4 [doi]
• Implementation of a Fully Differential Low Noise Current Source for Fluxgate SensorsMaximilian Scherzer, Mario Auer, Aris Valavanoglou, Werner Magnes. 1-4 [doi]
• Long-Range Low-Power Soil Water Content Monitoring System for Precision AgricultureMattia Barezzi, Umberto Garlando, Francesca Pettiti, Luca Nari, Davide Gisolo, Davide Canone, Danilo Demarchi. 1-4 [doi]
• Technical and pedagogical challenges in micro-nanoelectronics for facing upcoming digital societyOlivier Bonnaud. 1-4 [doi]
• Phase Space Reconstruction Based Real Time Fatigue Crack Growth Estimation for Structural Health Monitoring ShipsPrasannata Bhange, Deepak Kumar Joshi, Amit Acharyya, Sunil Kumar Pandu, Kamal Mankari, Swati Ghosh Acharyya, K. Sridhar. 1-4 [doi]
• TISIRC: A multichannel ASIC with gain control for SiPM detectorsRenzo Barraza, Angel Abusleme, Sergey Kuleshov. 1-4 [doi]