Tunable CMOS delay gate with reduced impact of fabrication mismatch on timing parameters - researchr publication

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Przemyslaw Mroszczyk, Piotr Dudek. Tunable CMOS delay gate with reduced impact of fabrication mismatch on timing parameters. In IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013, Paris, France, June 16-19, 2013. pages 1-4, IEEE, 2013. [doi]

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