A. K. Mrunal, M. A. Shirasgaonkar, R. Patrikar. Stacked Active Loads For Low Power, High Speed GaAs Digital Circuits (SALFL). In IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006. pages 1488-1491, IEEE, 2006. [doi]
@inproceedings{MrunalSP06a, title = {Stacked Active Loads For Low Power, High Speed GaAs Digital Circuits (SALFL)}, author = {A. K. Mrunal and M. A. Shirasgaonkar and R. Patrikar}, year = {2006}, doi = {10.1109/APCCAS.2006.342504}, url = {http://dx.doi.org/10.1109/APCCAS.2006.342504}, researchr = {https://researchr.org/publication/MrunalSP06a}, cites = {0}, citedby = {0}, pages = {1488-1491}, booktitle = {IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006}, publisher = {IEEE}, }