A. K. Mrunal, M. A. Shirasgaonkar, R. Patrikar. Stacked Active Loads For Low Power, High Speed GaAs Digital Circuits (SALFL). In IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006. pages 1488-1491, IEEE, 2006. [doi]
Abstract is missing.