A practical CAD technique for reducing power/ground noise in DSM circuits

Arindam Mukherjee, Krishna Reddy Dusety, Rajsaktish Sankaranarayan. A practical CAD technique for reducing power/ground noise in DSM circuits. In Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, Washington, DC, USA, April 28-29, 2003. pages 96-99, ACM, 2003. [doi]

@inproceedings{MukherjeeDS03,
  title = {A practical CAD technique for reducing power/ground noise in DSM circuits},
  author = {Arindam Mukherjee and Krishna Reddy Dusety and Rajsaktish Sankaranarayan},
  year = {2003},
  doi = {10.1145/764808.764834},
  url = {http://doi.acm.org/10.1145/764808.764834},
  researchr = {https://researchr.org/publication/MukherjeeDS03},
  cites = {0},
  citedby = {0},
  pages = {96-99},
  booktitle = {Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, Washington, DC, USA, April 28-29, 2003},
  publisher = {ACM},
  isbn = {1-58113-677-3},
}