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High Performance VLSI Architecture for Three-Step Search Algorithm

Rohan Mukherjee, Keyur Sheth, Anindya Sundar Dhar, Indrajit Chakrabarti, Somnath Sengupta. High Performance VLSI Architecture for Three-Step Search Algorithm. CSSP, 34(5):1595-1612, 2015. [doi]

Authors

Rohan Mukherjee

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Keyur Sheth

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Anindya Sundar Dhar

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Indrajit Chakrabarti

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Somnath Sengupta

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