Noise Convolutional Neural Networks and FPGA Implementation

Atsuki Munakata, Hiroki Nakahara, Shimpei Sato. Noise Convolutional Neural Networks and FPGA Implementation. In 2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL), Fredericton, NB, Canada, May 21-23, 2019. pages 85-90, IEEE, 2019. [doi]

Abstract

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