3.3-V BiCMOS circuit techniques for a 120-MHz RISC microprocessor

Fumio Murabayashi, Takashi Hotta, Shigeya Tanaka, Tatsumi Yamauchi, Hiromichi Yamada, Tetsuo Nakano, Yutaka Kobayashi, Tadaaki Bandoh. 3.3-V BiCMOS circuit techniques for a 120-MHz RISC microprocessor. J. Solid-State Circuits, 29(3):298-302, March 1994. [doi]

@article{MurabayashiHTYYNKB94,
  title = {3.3-V BiCMOS circuit techniques for a 120-MHz RISC microprocessor},
  author = {Fumio Murabayashi and Takashi Hotta and Shigeya Tanaka and Tatsumi Yamauchi and Hiromichi Yamada and Tetsuo Nakano and Yutaka Kobayashi and Tadaaki Bandoh},
  year = {1994},
  month = {March},
  doi = {10.1109/4.278351},
  url = {https://doi.org/10.1109/4.278351},
  researchr = {https://researchr.org/publication/MurabayashiHTYYNKB94},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {29},
  number = {3},
  pages = {298-302},
}