Design and implementation of low power and high speed multiplier using quaternary carry look-ahead adder

V. Muralidharan, N. Sathish Kumar. Design and implementation of low power and high speed multiplier using quaternary carry look-ahead adder. Microprocessors and Microsystems, 75:103054, 2020. [doi]

Authors

V. Muralidharan

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N. Sathish Kumar

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