Valentin Muresan, Xiaojun Wang, Mircea Vladutiu. The left edge algorithm in block test scheduling under power constraints. In IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings. pages 351-354, IEEE, 2000. [doi]
@inproceedings{MuresanWV00,
title = {The left edge algorithm in block test scheduling under power constraints},
author = {Valentin Muresan and Xiaojun Wang and Mircea Vladutiu},
year = {2000},
doi = {10.1109/ISCAS.2000.857102},
url = {https://doi.org/10.1109/ISCAS.2000.857102},
researchr = {https://researchr.org/publication/MuresanWV00},
cites = {0},
citedby = {0},
pages = {351-354},
booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings},
publisher = {IEEE},
}