Fast IP-Core Generation in a Partial Dynamic Reconfiguration Workflow

Matteo Murgida, Alessandro Panella, Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto. Fast IP-Core Generation in a Partial Dynamic Reconfiguration Workflow. In IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006. pages 74-79, IEEE, 2006. [doi]

Authors

Matteo Murgida

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Alessandro Panella

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Vincenzo Rana

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Marco D. Santambrogio

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Donatella Sciuto

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