Matteo Murgida, Alessandro Panella, Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto. Fast IP-Core Generation in a Partial Dynamic Reconfiguration Workflow. In IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006. pages 74-79, IEEE, 2006. [doi]
@inproceedings{MurgidaPRSS06,
title = {Fast IP-Core Generation in a Partial Dynamic Reconfiguration Workflow},
author = {Matteo Murgida and Alessandro Panella and Vincenzo Rana and Marco D. Santambrogio and Donatella Sciuto},
year = {2006},
doi = {10.1109/VLSISOC.2006.313207},
url = {http://dx.doi.org/10.1109/VLSISOC.2006.313207},
tags = {workflow},
researchr = {https://researchr.org/publication/MurgidaPRSS06},
cites = {0},
citedby = {0},
pages = {74-79},
booktitle = {IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006},
publisher = {IEEE},
}