Integrating boundary scan test into an ASIC design flow

Math Muris. Integrating boundary scan test into an ASIC design flow. In Proceedings IEEE International Test Conference 1990, Washington, D.C., USA, September 10-14, 1990. pages 472-477, IEEE Computer Society, 1990. [doi]

@inproceedings{Muris90,
  title = {Integrating boundary scan test into an ASIC design flow},
  author = {Math Muris},
  year = {1990},
  doi = {10.1109/TEST.1990.114056},
  url = {http://dx.doi.org/10.1109/TEST.1990.114056},
  researchr = {https://researchr.org/publication/Muris90},
  cites = {0},
  citedby = {0},
  pages = {472-477},
  booktitle = {Proceedings IEEE International Test Conference 1990, Washington, D.C., USA, September 10-14, 1990},
  publisher = {IEEE Computer Society},
  isbn = {0-8186-9064-},
}