Kazuhiro Nakamura, Masatoshi Yamamoto, Kazuyoshi Takagi, Naofumi Takagi. Fast and memory efficient VLSI architecture for output probability computations of HMM-based recognition systems. In International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA. pages 1688-1691, IEEE, 2008. [doi]
Abstract is missing.