Circuit Performance Prediction Considering Core Utilization with Interconnect Length Distribution Model

Hidenari Nakashima, Junpei Inoue, Kenichi Okada, Kazuya Masu. Circuit Performance Prediction Considering Core Utilization with Interconnect Length Distribution Model. IEICE Transactions, 88-A(12):3358-3366, 2005. [doi]

Authors

Hidenari Nakashima

This author has not been identified. Look up 'Hidenari Nakashima' in Google

Junpei Inoue

This author has not been identified. Look up 'Junpei Inoue' in Google

Kenichi Okada

This author has not been identified. Look up 'Kenichi Okada' in Google

Kazuya Masu

This author has not been identified. Look up 'Kazuya Masu' in Google