29.6 A 3-to-10Gb/s 5.75pJ/b transceiver with flexible clocking in 65nm CMOS

Romesh Kumar Nandwana, Saurabh Saxena, Ahmed Elkholy, Mrunmay Talegaonkar, Junheng Zhu, Woo-seok Choi, Ahmed Elmallah, Pavan Kumar Hanumolu. 29.6 A 3-to-10Gb/s 5.75pJ/b transceiver with flexible clocking in 65nm CMOS. In 2017 IEEE International Solid-State Circuits Conference, ISSCC 2017, San Francisco, CA, USA, February 5-9, 2017. pages 492-493, IEEE, 2017. [doi]

@inproceedings{NandwanaSETZCEH17,
  title = {29.6 A 3-to-10Gb/s 5.75pJ/b transceiver with flexible clocking in 65nm CMOS},
  author = {Romesh Kumar Nandwana and Saurabh Saxena and Ahmed Elkholy and Mrunmay Talegaonkar and Junheng Zhu and Woo-seok Choi and Ahmed Elmallah and Pavan Kumar Hanumolu},
  year = {2017},
  doi = {10.1109/ISSCC.2017.7870476},
  url = {http://dx.doi.org/10.1109/ISSCC.2017.7870476},
  researchr = {https://researchr.org/publication/NandwanaSETZCEH17},
  cites = {0},
  citedby = {0},
  pages = {492-493},
  booktitle = {2017 IEEE International Solid-State Circuits Conference, ISSCC 2017, San Francisco, CA, USA, February 5-9, 2017},
  publisher = {IEEE},
  isbn = {978-1-5090-3758-2},
}