Systolic Architecture for Computing the Discrete Fourier Transform on FPGAs

J. Greg Nash. Systolic Architecture for Computing the Discrete Fourier Transform on FPGAs. In 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 17-20 April 2005, Napa, CA, USA, Proceedings. pages 305-306, IEEE Computer Society, 2005. [doi]

Authors

J. Greg Nash

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