A 128Gb 3b/cell NAND flash design using 20nm planar-cell technology - researchr publication authors

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G. Naso, L. Botticchio, M. Castelli, C. Cerafogli, M. Cichocki, P. Conenna, A. D'Alessandro, L. De Santis, D. Di Cicco, W. Di Francesco, M. L. Gallese, G. Gallo, M. Incarnati, C. Lattaro, A. Macerola, G. G. Marotta, V. Moschiano, D. Orlandi, F. Paolini, S. Perugini, L. Pilolli, P. Pistilli, G. Rizzo, F. Rori, Massimo Rossini, G. Santin, E. Sirizotti, A. Smaniotto, U. Siciliani, M. Tiburzi, R. Meyer, A. Goda, B. Filipiak, Tommaso Vali, M. Helm, R. Ghodsi. A 128Gb 3b/cell NAND flash design using 20nm planar-cell technology. In 2013 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2013, San Francisco, CA, USA, February 17-21, 2013. pages 218-219, IEEE, 2013. [doi]

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